Haldun Hadimioglu

Industry Professor
Computer Science and Engineering

haldun@ nyu.edu                                                                                                                 

• My schedule
• Courses
• Past Work
• Biography
  
• Address

• I have an open-door policy.
  
• Typically, I am in my office if I am not busy
  
• Please check my schedule below.  When I am in my office and not busy, I will answer questions 
  
• Please send me email so that I wait for you for a time you would like
• My schedule will be more concrete once the semester starts

My tentative fall 2019 Schedule which may change as the semester progresses

Courses 

Fall 2019

Please read this section frequently for announcements

• CS 2204 : Digital Logic and State Machine Design

• The course overview
  • This course is what is known as Digital Logic.  It is the first digital hardware course at NYU Tandon School of Engineering. 
    • Please taka a look at the syllabus in fall 2019.

• The course is on digital circuits that make up digital hardware.  More specifically, the course covers fundamentals of digital circuits and state machine design by using digital circuits as many digital devices we use today are state machines.  Overall, Digital Logic is the first step to design chips (such as microprocessors, GPUs), boards (such as motherboards), computers, embedded systems (such as robots and cell phones) a starting point nanotechnology which you will see why throughout the semester.

  • Students also learn a hardware description language, an HDL, to design hardware.  The HDL language learn is Verilog.  In addition, the other popular HDL, VHDL, is also studied.  This is possible since if one knows one HDL, it is very easy to learn another. 

• The course requires considerable time commitment from students :

  • 3 lecture hours a week and 3 lab hours a week

  • The time to meet with teammates to do the homework and term project together.  

  • The time to study for the course yourself.

The textbook : There is a new edition of the textbook we will use.  Please do not buy the old edition !
• Digital Design Principles and Practices, John F. Wakerly, 5^th edition, Prentice Hall, 2018. ISBN : 978-013-446-0093
  • The 4^th edition of the book will not be used.  Please do not buy the 4^th edition of the book. 

• CS 6133 : Computer Architecture I

Please do NOT rush to register to the course !  Please go through the lines below and do the work asked !

• General Information :
  • The CS 6133 prerequisite is an undergraduate-level Computer Architecture course that includes the knowledge of undergraduate Computer Architecture which requires Digital Logic
    • In other words, the course has been upgraded and its new version is now offered.
  • This course is the first graduate Computer Architecture course in the Computer Science and Engineering Department at NYU Tandon School of Engineering. 
    • The course follows the undergraduate level Computer Architecture course.  Therefore, it is the second Computer Architecture course at Tandon.  The course uses RISC-V, rather than MIPS.  But, RISC-V is a hybrid language with a number of features of RISC languages.  If one knows MIPS, then learning RISC V is not difficult
    • In order to test your knowledge to determine if you have the background for CS6133, work on the program on slide 4 of the following presentation MIPS01 (a PowerPoint file) that is a summary of the undergraduate Computer Architecture course that teaches the MIPS processor
      • If you cannot get the right clock period, study the slides
      • If you cannot follow the slides, you need to take an undergraduate level Computer Architecture course !
      • Please take a look at the syllabus in fall 2019
• How do you know your undergraduate Computer Architecture course is sufficient ?  You need to know all of the following :
  • An instruction set,
  • Unpipelined CPU design with hardwiring and microprogramming,
  • Pipelined CPU design and
  • Memory hierarchies with cache memories and virtual memory

• The course overview
• The course starts with covering instruction set design and one instruction set the RISC-V set as an example.  Then, techniques to improve the performance and capacity of computer architecture and organization are given.  Details are as follows :
  • In the beginning of the semester, we will cover instruction set design techniques, use RISC-V computer instruction set as an example and build remaining topics on this instruction set
  • The unpipelined and integer pipelined CPU designs are applied to the RISC-V CPU.  The floating-point RISC-V pipeline is added to the integer pipeline afterwards.
  • Then, we will cover advanced CPU and memory topics that include
    • Tomasulo CPU
    • Hardware Speculative CPU, Super-scalar CPU and SMT
    • Non-traditional processing techniques are studied :
      • VLIW, Vector processing and other
    • We conclude with advanced memory hierarchies
• Students will do projects to reinforce their learning

• Textbook : There is a new edition of the textbook we will use.  Please do not buy the old edition !
  • Computer Architecture : A Quantitative Approach, 6^th edition, J. L. Hennessy and D. A. Patterson, Morgan Kaufmann Publishers Inc., 2019.  ISBN : 978-0-12-811905-1
    • The 5^th edition of the book will not be used.  Please do not buy the 5^th edition of the book

• Those students who want to register to CS6133 but did not take an undergraduate Computer Architecture course : Please do not take CS 6133

Past Work

• Symposium on Architectures for Networking and Communication Systems - ANCS 2008 is in San Jose, California on November 6-7, 2008.   The organization is handled by Mark Franklin (Washington University in St. Louis) who is the general chair.   D. K. Panda (Ohio State University)and  Dimitri Stiliadis (Bell Labs) are program chairs.  Peter Z. Onufryk (IDT), Patrick Crowley (Washington University in St. Louis), Michelle Gong (Intel) and John Lockwood (Stanford University) are contributing to the organization.
• ANCS-2007 was in Orlando, Florida on December 3-4, 2007.
• ANCS-2006 was in San Jose, California on December 3-5, 2006.
• ANCS-2005 was in Princeton on October 26-28, 2005. 

• Nanoarchitecture
  
• 2nd IEEE International Workshop on Defect and Fault Tolerant Nanoscale Architectures (NANOARCH 2006) organized by my colleague Ramesh Karri in the Electrical Engineering Department at Polytechnic University.  It was held in Boston, Massachusetts, June 17, 2006, at the at the 33rd International Symposium on Computer Architecture in June 2006 (ISCA 33).

• Application Specific Processors
• Workshops organized by Alex Orailoglu (UC San Diego)
• Workshop on Application Specific Processors 2005 (WASP 2005), held in conjuction with  the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), September 22, 2005.
  

• Workshop on Application Specific Processors (WASP'03) in conjunction with the Microarchitecture conference (MICRO-36) in San Diego, California, December 2, 2003.

• Network Processors : The idea of a workshop came out during discussions that included Peter Z. Onufryk of IDT, Mark A. Franklin of University of Washington in St. Louis and Patrick Crowley of University of Washington in St. Louis in the summer of 2001.  The first "Network Processors" workshop took place in February 2002.
• Workshop on Network Processors and Applications - NP3 at the Tenth International Symposium on High Performance Computer Architecture (HPCA 10) in Madrid, Spain on February 14 and 15, 2004. The "Network Processor Design Issues and Practices Volume 3"  book with selected workshop papers has been published by Morgan Kaufman.
  

• Workshop on Network Processors - NP2 at HPCA 9, in Anaheim California, on February 8 - 9, 2003.  The "Network Processor Design Issues and Practices Volume 2"  book with selected workshop and industry papers has been published by Morgan Kaufman.  

• The special session on Advanced Networking Hardware at ISCIS XVII, University of Central Florida, Orlando, Florida, October 28, 2002.  

• Workshop on Network Processors at HPCA 8 in Cambridge Massachusetts, on February 3, 2002.  The "Network Processor Design Issues and Practices Volume 1"  book containing selected workshop papers and industry papers has been published by Morgan Kaufman.
  

• The Memory Wall issue : The idea of a workshop on this topic came out during the discussions with David Kaeli of Northeastern University in late 1999.  The first workshop was the "Memory Wall" workshop in June 2000.
• 2nd Annual Workshop on Memory Performance Issues at ISCA 29 in Anchorage on May 25, 2002. 

• Workshop on Memory Performance Issues (WMPI) at the 28th International Symposium on Computer Architecture in Sweden in June/July 2001 (ISCA 28).  The "High Performance Memory Systems"  book containing selected workshop papers has been published by Springer Verlag.   

• Workshop on Solving the Memory Wall Problem at the 27th International Symposium on Computer Architecture in June 2000 (ISCA 27).   The "Advances in High Permance Memory Systems" special issue containing selected workshop papers and other papers in the area is published in IEEE Transactions on Computers.    

• A WDM (optical) switch, joint work with Fow-Sen Choa of University of Maryland Baltimore County.  The project was started by Jonathan Chao of Polytechnic Institute of NYU and Fow-Sen Choa in the 1990s.  The work is described in "An Optical Packet Switch Based on WDM Technologies," F. -S. Choa, et.al., IEEE Journal of Lightwave Technology, March 2005, Vol. 3, No. 3, pp. 994 - 1014.   

• Other :
• The 35^th International Symposium on Microarchitecture (MICRO-35), November 18-22, 2002.  Kemal Ebcioglu who was at IBM Yorktown Heights at the time led the organization of the symposium.  

My Ph. D. degree is in Computer Science from Polytechnic Institute of NYU (now Tandon School of Engineering of NYU).  The Ph.D. work was on parallel I/O, specifically a parallel disk system and the associated file server for the hypercube computer. My B.S. and M.S. degrees are in Electrical Engineering from Middle East Technical University, METU, Ankara, Turkey.

Address

Computer Science and Engineering
NYU Tandon School of Engineering

Six MetroTech Center
Brooklyn, New York 11201